The present invention relates to a method and apparatus for the acquisition of repetitive signals in a sensing device comprising a transmitter to emit a repetitive electromagnetic signal into a transmission channel, an object that interacts with said signal producing a return signal via a reception channel, and a receiver that detects and converts the return signal onto a digital representation through the processing of edge transitions from at least one threshold crossing detector. In particular this disclosure describes a method and apparatus for the digitization of low-level repetitive electronic signals commonly encountered in time-of-flight distance measurement devices.
A variety of sensing applications require the detection and averaging of electronic signals returning from an object radiated with an electromagnetic field. Extracted information from the return signal may reflect physical characteristics of the object such as reflectivity, florescence, frequency or time-delay dispersion. Relational information such as distance can be obtained by measurement of the time-of-flight between transmission and signal reception. Through the processing of multiple signal reception channels object orientation in azimuth and elevation can also be derived. A repetitive transmitted signal is commonly used to allow signal averaging providing processing gain to improve receiver sensitivity or to allow the use of analog sample-and-hold techniques to economically sample a high frequency signal prior to lower speed analog-to-digital conversion. The digitization of the return signal offers a high-degree of flexibility in post processing. Processing approaches such as signal averaging, correlation, convolution and frequency transforms are often used to extract useful information from the digitized return signal and are easily implemented using common DSP methodologies.
Excessive cost, power consumption, or complex interface requirements are often issues prohibiting the use of monolithic analog-to-digital converters in high-frequency sensor applications. At digitization rates in excess of 100 mega samples per second, A-D converters typically cost several dollars and as digitization rates approach a GHz, costs increase sufficiently to be unsuitable for many applications. Power consumption, often in excess of one watt, can be a significant limitation for battery-powered devices. Finally the interfacing of digital processing circuitry to a high-speed A-D converter dictates the use of large numbers of parallel I/O channels creating the potential for system noise issues and increased hardware complexity.
For high-speed repetitive sampling, various analog sample-and-hold methods are practiced. At signal bandwidths of a GHz or more, diode samplers are often applied to synchronously sample the analog signal voltage. Effective signal capture times as low as 10's of pico-seconds make this method practical for direct signal digitization into the giga-hertz. Historically this approach has been used in high-speed sampling oscilloscopes to digitize a waveform by scanning a narrow signal acquisition window over a larger time period. At each time point one or more analog samples are taken and subsequently the analog value is digitized using a lower-speed analog-to-digital converter. A class of low cost samplers exemplified by U.S. Pat. No. 5,757,320 McEwen has been applied to impulse radar based distance measurement along with a variety of specialized applications.
A limitation of repetitive sampling using sample-and-hold technology is low processing efficiency. Processing gain relates to the ability of post processing to improve signal-to-noise ratio through signal averaging. For incoherent signal integration, the signal-to-noise ratio theoretically improves following a square root relationship with the number analog values averaged. For pin diode or FET based samplers, the sampling window covers a very short time interval, but often requires 10's of nanoseconds before it is ready for the next sample. A signal-sampling time window comparable in duration to the recovery time of sampler dictates that only a single sample may be taken during the window resulting in a low effective signal acquisition duty cycle.
Fast analog shift registers can approach the speed capability of pin-diode based sample-and holds with the added benefit of allowing sequential samples within an acquisition window. U.S. Pat. No. 6,509,958 by Pierenkemper teaches a method for high accuracy distance measurement by sampling a return signal using a high-speed analog shift register. The CCD based shift register performs a rate conversion by rapidly shifting the analog values into the register and subsequently feeding the data out at a lower rate to an economical analog-to-digital converter. Since time-of-flight rangefinders typically use transmitters with low duty cycle, time is often available between pulses to process the signal samples acquired during the reception time window.
In U.S. Pat. No. 6,950,177 inventor Robert Lewis et al. teaches a method to achieve high measurement accuracy using a low-cost signal digitization approach using on a single-bit comparator with an adjustable threshold reference. The sampling and processing is suitable for implementation in high performance FPGAs (field-programmable-gate-arrays) allowing a high level of hardware integration at low system cost. The disclosed method is based on the storage of a succession of histograms representing the cumulative statistics of the one/zero logical state of the comparator output. After the accumulation of data at a threshold level, the histogram data is combined with previous data. Following each series of acquisitions, the threshold level was increased and the histogram acquisition and accumulation process repeats until the threshold was swept through the entire waveform in a stepwise fashion. The method weights the most accurate data at each comparison level allowing the generation of a composite waveform with good signal fidelity. Since the incoming bit rate is significantly faster than the base clock rate of the system, a period after each signal acquisition window significant time is required to perform a bit summation and signal reconstruction process.
To compensate for amplitude dependent delay dispersion in a receiver, a transmit reference signal can be injected into the receiver channel with an amplitude matched to the return signal. The matching of the signal return and reference in a single common receiver channel, dictates that non-linear distortion inherent in the receive channel impact both the reference and receive signals in a similar fashion. Since both signals are matched, amplitude dependent distortion in the received signal matches the distortion in the reference such that no net distance measurement error is produced.
A limitation in the analog-to-digital conversion process of both Pierenkemper and Lewis et al. is the requirement for a downtime to process an acquired block of data. In Pierenkemper the downtime is required to unload contents of the CCD delay line into a lower rate A-D converter. In Lewis et al. time is required to allow the summation and storage of bit information from the high-speed bit memory. In many applications the transmitter needs to operate continuously for relatively long periods of time. This is often the case when lower power CW Lasers or LED's are applied in phase detection based distance measurement systems with long signal integration times. Integration times a millisecond or longer makes the temporary storage of raw bit data impractical for low cost hardware with limited memory capacity.
In Lewis et al. the use of a single comparator for analog-to-digital conversion is desirable due to its low cost and complexity, but the need for an adjustable attenuator to match the reference and return signals amplitudes adds undesirable cost and complexity in addition to adding constraints to system performance. The reaction time of an adjustable attenuator places a fundamental limitation in the minimum measurement time of the system. The setting time of an attenuator based on liquid crystal or mechanical shutter, often on the order of 100's of milliseconds, limits the ability of the system to react to rapid signal level changes encountered in optical scanning beam systems.
It is an object of the present invention to further develop a signal digitization approach suitable for low-cost sensor applications that allows continuous signal acquisition, high processing gain and suitability for implementation in field programmable gate arrays.
An added objective of the present invention is to provide an optional means to feed the transmitted signal back into the receiver to provide a reliable reference for the time of transmission. Since the disclosed edge digitization embodiments are linear, a variety of digital processing techniques can be applied to the digitized receive signal to compensate for typical limitations in hardware performance.